AOD424 20v n-channel mosfet general description product summary v ds i d (at v gs =4.5v) 45a r ds(on) (at v gs =4.5v) < 4.4m w r ds(on) (at v gs =2.5v) < 5.7m w 100% uis tested 100% r g tested symbol v ds drain-source voltage 20 the AOD424 combines advanced trench mosfet technology with a low resistance package to provide extremely low r ds(on) . this device is ideal for load switch and battery protection applications. v maximum units parameter absolute maximum ratings t a =25c unless otherwise noted 20v g ds to252 dpak top view bottom view g s d g s d v ds v gs i dm i as , i ar e as , e ar t j , t stg symbol t 10s steady-state steady-state r q jc maximum junction-to-case c/w c/w maximum junction-to-ambient a d 1.2 50 1.5 power dissipation a p dsm w t a =70c 100 1.6 t a =25c continuous drain current 162 18 57 avalanche energy l=0.1mh c w a t a =70c 160 pulsed drain current c continuous drain current g i d 45 35 t c =25c t c =100c drain-source voltage 20 v mj avalanche current c 15 a v 12 gate-source voltage a t a =25c i dsm c thermal characteristics units maximum junction-to-ambient a c/w r q ja 16 41 20 parameter typ max t c =25c 2.5 50 t c =100c junction and storage temperature range -55 to 175 power dissipation b p d g ds to252 dpak top view bottom view g s d g s d rev 0: february 2011 www.aosmd.com page 1 of 6
AOD424 symbol min typ max units bv dss 20 v v ds =20v, v gs =0v 1 t j =55c 5 i gss 100 na v gs(th) gate threshold voltage 0.5 1 1.6 v i d(on) 160 a 3.6 4.4 t j =125c 5.1 6.2 4.5 5.7 m w g fs 105 s v sd 0.7 1 v i s 45 a c iss 3080 3860 4630 pf c oss 520 740 960 pf c rss 350 580 810 pf r g 0.6 1.4 2.1 w q g (4.5v) 28 36 43 nc q gs 9 nc q gd 12 nc t d(on) 7 ns t r 8 ns t 70 ns electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions drain-source breakdown voltage i d =250 m a, v gs =0v v gs =10v, v ds =5v v gs =4.5v, i d =20a on state drain current v gs =2.5v, i d =20a forward transconductance diode forward voltage v gs =10v, v ds =10v, r l =0.5 w , r =3 w m a v ds =v gs i d =250 m a v ds =0v, v gs = 12v zero gate voltage drain current gate-body leakage current m w v gs =0v, v ds =0v, f=1mhz total gate charge r ds(on) static drain-source on-resistance i dss reverse transfer capacitance v gs =0v, v ds =10v, f=1mhz turn-off delaytime v gs =10v, v ds =10v, i d =20a gate source charge gate drain charge gate resistance i s =1a,v gs =0v v ds =5v, i d =20a switching parameters maximum body-diode continuous current g input capacitance output capacitance turn-on delaytime dynamic parameters turn-on rise time t d(off) 70 ns t f 18 ns t rr 13 17 20 ns q rr 29 36 43 nc this product has been designed and qualified for th e consumer market. applications or uses as critical components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. body diode reverse recovery time r gen =3 w turn-off fall time body diode reverse recovery charge i f =20a, di/dt=500a/ m s turn-off delaytime i f =20a, di/dt=500a/ m s a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. the power dissipation p dsm is based on r q ja and the maximum allowed junction temperature of 150 c. the value in any given application depends on the user's specific board design, and the maximu m temperature of 175 c may be used if the pcb allows it. b. the power dissipation p d is based on t j(max) =175 c, using junction-to-case thermal resistance, and i s more useful in setting the upper dissipation limit for cases where additional heatsi nking is used. c. repetitive rating, pulse width limited by juncti on temperature t j(max) =175 c. ratings are based on low frequency and duty cycl es to keep initial t j =25 c. d. the r q ja is the sum of the thermal impedence from junction t o case r q jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case t hermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of t j(max) =175 c. the soa curve provides a single pulse rating. g. the maximum current rating is package limited. h. these tests are performed with the device mounte d on 1 in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. rev 0: february 2011 www.aosmd.com page 2 of 6
AOD424 typical electrical and thermal characteristics 17 52 10 0 18 0 20 40 60 80 0.5 1 1.5 2 2.5 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 0 2 4 6 8 0 5 10 15 20 25 30 r ds(on) (m w ww w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 0.8 1 1.2 1.4 1.6 1.8 0 25 50 75 100 125 150 175 200 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =2.5v i d =20a v gs =4.5v i d =20a 25 c 125 c v ds =5v v gs =2.5v v gs =4.5v 0 20 40 60 80 100 0 1 2 3 4 5 i d (a) v ds (volts) fig 1: on-region characteristics (note e) v gs =1.5v 2v 4.5v 2.5v 40 0 20 40 60 80 0.5 1 1.5 2 2.5 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 0 2 4 6 8 0 5 10 15 20 25 30 r ds(on) (m w ww w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 1.2 i s (a) v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c 0.8 1 1.2 1.4 1.6 1.8 0 25 50 75 100 125 150 175 200 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =2.5v i d =20a v gs =4.5v i d =20a 1 2 3 4 5 6 7 8 9 10 0 2 4 6 8 r ds(on) (m w ww w ) v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) 25 c 125 c v ds =5v v gs =2.5v v gs =4.5v i d =20a 25 c 125 c 0 20 40 60 80 100 0 1 2 3 4 5 i d (a) v ds (volts) fig 1: on-region characteristics (note e) v gs =1.5v 2v 4.5v 2.5v rev 0: february 2011 www.aosmd.com page 3 of 6
AOD424 typical electrical and thermal characteristics 17 52 10 0 18 0 1 2 3 4 5 0 10 20 30 40 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 1000 2000 3000 4000 5000 6000 7000 0 5 10 15 20 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss 0 40 80 120 160 200 0.0001 0.001 0.01 0.1 1 10 power (w) pulse width (s) figure 10: single pulse power rating junction-to- case (note f) c oss c rss v ds =10v i d =20a t j(max) =175 c t c =25 c 10 m s 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 i d (amps) v ds (volts) figure 9: maximum forward biased safe operating area (note f) 10 m s 10ms 1ms dc r ds(on) t j(max) =175 c t c =25 c 100 m s 40 0 1 2 3 4 5 0 10 20 30 40 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 1000 2000 3000 4000 5000 6000 7000 0 5 10 15 20 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss 0 40 80 120 160 200 0.0001 0.001 0.01 0.1 1 10 power (w) pulse width (s) figure 10: single pulse power rating junction-to- case (note f) 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 z q qq q jc normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) c oss c rss v ds =10v i d =20a single pulse d=t on /t t j,pk =t c +p dm .z q jc .r q jc t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse t j(max) =175 c t c =25 c 10 m s 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 i d (amps) v ds (volts) figure 9: maximum forward biased safe operating area (note f) 10 m s 10ms 1ms dc r ds(on) t j(max) =175 c t c =25 c 100 m s r q jc =1.5 c/w rev 0: february 2011 www.aosmd.com page 4 of 6
AOD424 typical electrical and thermal characteristics 17 52 10 0 18 0 20 40 60 80 100 120 0 25 50 75 100 125 150 175 power dissipation (w) t case ( c) figure 13: power de-rating (note f) 0 10 20 30 40 50 60 0 25 50 75 100 125 150 175 current rating i d (a) t case ( c) figure 14: current de-rating (note f) 0 20 40 60 80 100 0.0001 0.01 1 100 power (w) pulse width (s) figure 15: single pulse power rating junction-to- ambient (note h) t a =25 c 10 100 1000 1 10 100 1000 i ar (a) peak avalanche current time in avalanche, t a ( m mm m s) figure 12: single pulse avalanche capability (note c) t a =25 c t a =150 c t a =100 c t a =125 c 40 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 z q qq q ja normalized transient thermal resistance pulse width (s) figure 16: normalized maximum transient thermal imp edance (note h) single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse 0 20 40 60 80 100 120 0 25 50 75 100 125 150 175 power dissipation (w) t case ( c) figure 13: power de-rating (note f) 0 10 20 30 40 50 60 0 25 50 75 100 125 150 175 current rating i d (a) t case ( c) figure 14: current de-rating (note f) 0 20 40 60 80 100 0.0001 0.01 1 100 power (w) pulse width (s) figure 15: single pulse power rating junction-to- ambient (note h) t a =25 c r q ja =50 c/w 10 100 1000 1 10 100 1000 i ar (a) peak avalanche current time in avalanche, t a ( m mm m s) figure 12: single pulse avalanche capability (note c) t a =25 c t a =150 c t a =100 c t a =125 c rev 0: february 2011 www.aosmd.com page 5 of 6
AOD424 - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off id + l vgs vds bv unclamped inductive switching (uis) test circuit & waveforms vds dss 2 e = 1/2 li ar ar - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off vdd vgs id vgs rg dut - + vdc l vgs vds id vgs bv i unclamped inductive switching (uis) test circuit & waveforms ig vgs - + vdc dut l vds vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar dss 2 e = 1/2 li di/dt i rm rr vdd vdd q = - idt ar ar t rr rev 0: february 2011 www.aosmd.com page 6 of 6
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